Future apps require extremely high computing capabilities, but are currently unobtainable due to frequency scaling and power limits. Intel is establishing fundamental architectural shift to 10s or 100s of low-power, highly threaded IA cores per die.
Architecture yields orders of magnitude improvements in inter-core latency and bandwidth over traditional multi-processors systems. As a result Intel is rethinking the micro and platform architectures and programming models to fully capitalize on benefits.
As Internet and high performance computing resources require a more balanced platform architecture to ensure scalability, Intel is driving this new platform capability for high bandwidth memory and I/O, aggressive power management, simplified parallel programming.
In addition to the Multi-core public unveiling, Intel announces Multi-core Research Program. A coordinated research program from – circuits through emerging workloads – for future, highly scalable, energy-efficient platforms.
The Multi-Core Research Program
|Programmability||Simplify the writing of parallel programs||Transactional memory to replace locks|
|Balanced Design||Bring more memory closer to the cores||3D stacked memory|
|Energy Efficiency||Fine control over core voltage and frequency||Hi-speed CMOS voltage regulators|
|Scalability||Identify and eliminate the remaining bottlenecks||Configurable cache architecture|
|Applications||Collaborate with leading application developers||Future disclosure|
The first quad-core servers will be available from Intel in early 2007